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 UBA2016A/15/15A
600 V fluorescent lamp driver with PFC, linear dimming and boost function
Rev. 1 -- 20 May 2011 Objective data sheet
1. General description
The UBA2016A/15/15A are high voltage Integrated Circuits (IC) intended to drive fluorescent lamps with filaments such as Tube Lamps (TL) and Compact Fluorescent Lamps (CFL) in general lighting applications. The IC comprises a fluorescent lamp control module, half-bridge driver, built-in critical conduction mode Power Factor Correction (PFC) controller/driver and several protection mechanisms. The IC drives fluorescent lamp(s) using a half-bridge circuit made of two MOSFETs with a supply voltage of up to 600 V. The UBA2016A/15/15A are designed to be supplied by a start-up bleeder resistor and a dV/dt supply from the half-bridge circuit, or any other auxiliary supply derived from the half-bridge or the PFC. The supply current of the IC is low. An internal clamp limits the supply voltage.
2. Features and benefits
Power factor correction features: Integrated 4-pin critical conduction mode PFC controller/driver Open and short pin-short protection on PFC feedback pin Overcurrent protection Overvoltage protection Half-bridge driver features: Integrated level-shifter for the high-side driver of the half-bridge Integrated bootstrap diode for the high-side driver supply of the half-bridge Independent non-overlap time Fluorescent lamp controller features: Linear dimming (UBA2016A and UBA2015A only) EOL (End-Of-Life) detection (both symmetrical and asymmetrical) Adjustable preheat time Adjustable preheat current Adjustable fixed frequency preheat (UBA2015 and UBA2015A only) Lamp ignition failure detection Ignition detection of all lamps fat multiple lamps with separate resonant tanks Second ignition attempt if first failed Constant output power independent of mains voltage variations Automatic restart after changing lamps Adjustable lamp current boost at start-up (UBA2016A only) Lamp current control
NXP Semiconductors
UBA2016A/15/15A
600 V fluorescent lamp driver
Enable input (UBA2015 and UBA2015A only) Protection Hard switching/capacitive mode protection Half-bridge overcurrent (coil saturation) protection Lamp overvoltage (lamp removal) protection Temperature protection
3. Applications
Intended for fluorescent lamp ballasts with either a dimmable (UBA2016A and UBA2015A) or a fixed (UBA2015) output and PFC for AC mains voltages of up to 390 V.
4. Ordering information
Table 1. Ordering information Package Name UBA2016AT/N1 UBA2015T/N1 UBA2015AT/N1 UBA2016AP/N1 UBA2015P/N1 UBA2015AP/N1 SO20 SO20 SO20 DIP20 DIP20 DIP20 Table 2. Type UBA2016A UBA2015 UBA2015A Description plastic small package outline package; 20 leads; body width 7.5 mm plastic small package outline package; 20 leads; body width 7.5 mm plastic small package outline package; 20 leads; body width 7.5 mm plastic dual in-line package; 20 leads; (300 mil) plastic dual in-line package; 20 leads; (300 mil) plastic dual in-line package; 20 leads; (300 mil) Functional selection PFC yes yes yes dim yes no yes Boost yes no no fixed frequency preheat no yes yes Version SOT163-1 SOT163-1 SOT163-1 SOT146-1 SOT146-1 SOT146-1 Type number
UBA2016A_15_15A
All information provided in this document is subject to legal disclaimers.
(c) NXP B.V. 2011. All rights reserved.
Objective data sheet
Rev. 1 -- 20 May 2011
2 of 42
NXP Semiconductors
UBA2016A/15/15A
600 V fluorescent lamp driver
5. Block diagram
VDD
5 A
UBA2016A
AUXPFC 13
0.1 V
DEMAG
GATE DRIVE TEMPERATURE SENSE PFC CONTROLLER S Q R PFCOK 140 C 80 C SUPPLY AND REFERENCES
14 GPFC
OVPFC 1.39 V FBPFCOK 1V 0.25 V FBPFC 11 1.27 V COMPPFC 12 ton TIMER PFCOSP
5 IREF
16 VDD 1 mA restart
13.4 V
19 FSHB IC off 3.0 V brownout UVLO on: > 12.4 V off: < 10.0 V LEVEL SHIFTER HIGH-SIDE GATE DRIVE 20 GHHB 18 SHHB HARD SWITCHING/ CAPACITIVE MODE DETECTION
5 A
EOL 3 2x
16 A
OR
end of life
OVextra 3.35 V OV 2.5 V ign 1V 80 mV
2.6 A
NON OVERLAP FLUORESCENT LAMP CONTROLLER OCpreheat
LOW-SIDE GATE DRIVE VDD 0.5 V
8.5 A
17 GLHB
VFB 4
1 SLHB
VFBlow
LAMP ON DETECTION
OCburn 2.5 V TIMER VCO
100 A
8 CPT 10 BOOST
1V IFB 2
60 k
overcurrent 3V 0.5 V
9 A 9 A
not burn 5V 1.27 V
26 A
5V 5V
47 A
9 DIM CIFB
6
7 CF
001aam531
Fig 1.
Block diagram UBA2016A
All information provided in this document is subject to legal disclaimers. (c) NXP B.V. 2011. All rights reserved.
UBA2016A_15_15A
Objective data sheet
Rev. 1 -- 20 May 2011
3 of 42
NXP Semiconductors
UBA2016A/15/15A
600 V fluorescent lamp driver
VDD
5 A
UBA2015 UBA2015A
0.1 V DEMAG GATE DRIVE TEMPERATURE SENSE PFC CONTROLLER S Q R PFCOK 140 C 80 C SUPPLY AND REFERENCES 5 IREF 14 GPFC
AUXPFC 13
OVPFC 1.39 V FBPFCOK 1V 0.25 V FBPFC 11 1.27 V COMPPFC 12 ton TIMER PFCOSP
16 VDD 1 mA restart
13.4 V
19 FSHB IC off 3.0 V brownout UVLO on: > 12.4 V off: < 10.0 V LEVEL SHIFTER HIGH-SIDE GATE DRIVE 20 GHHB 18 SHHB HARD SWITCHING/ CAPACITIVE MODE DETECTION
5 A
EOL 3 2x
16 A
OR
end of life
OVextra 3.35 V OV 2.5 V ign 1V 80 mV
2.6 A
NON OVERLAP FLUORESCENT LAMP CONTROLLER OCpreheat
LOW-SIDE GATE DRIVE VDD 0.5 V
8.5 A
17 GLHB
VFB 4
1 SLHB
VFBlow
LAMP ON DETECTION
OCburn 2.5 V TIMER 8 CPT
VCO
FIXED FREQUENCY PREHEAT
100 A
10 PH/EN
1V IFB 2 3V
overcurrent 0.5 V
9 A 9 A
not burn 5V 1.27 V
26 A
5V 5V
47 A
60 k
0.25 V 9(1) DIM CIFB 6 7 CF
001aan208
(1) Pin 9 is not connected in the UBA2015.
Fig 2.
Block diagram UBA2015A and UBA2015
All information provided in this document is subject to legal disclaimers. (c) NXP B.V. 2011. All rights reserved.
UBA2016A_15_15A
Objective data sheet
Rev. 1 -- 20 May 2011
4 of 42
NXP Semiconductors
UBA2016A/15/15A
600 V fluorescent lamp driver
6. Pinning information
6.1 Pinning
SLHB IFB EOL VFB IREF CIFB CF CPT DIM
1 2 3 4 5 6 7 8 9
20 GHHB 19 FSHB 18 SHHB 17 GLHB 16 VDD 15 GND 14 GPFC 13 AUXPFC 12 COMPPFC 11 FBPFC
001aam532
SLHB IFB EOL VFB IREF CIFB CF CPT n.c.
1 2 3 4 5 6 7 8 9
20 GHHB 19 FSHB 18 SHHB 17 GLHB 16 VDD 15 GND 14 GPFC 13 AUXPFC 12 COMPPFC 11 FBPFC
001aan200
UBA2016A
UBA2015
BOOST 10
PH/EN 10
Fig 3.
Pin configuration UBA2016A
Fig 4.
Pin configuration UBA2015
SLHB IFB EOL VFB IREF CIFB CF CPT DIM
1 2 3 4 5 6 7 8 9
20 GHHB 19 FSHB 18 SHHB 17 GLHB 16 VDD 15 GND 14 GPFC 13 AUXPFC 12 COMPPFC 11 FBPFC
001aan199
UBA2015A
PH/EN 10
Fig 5.
Pin configuration UBA2015A
6.2 Pin description
Table 3. Symbol SLHB IFB EOL VFB IREF CIFB CF CPT DIM n.c.
UBA2016A_15_15A
Pin description Pin 1 2 3 4 5 6 7 8 9 9 Description half-bridge (HB) low-side switch current sense input lamp current feedback input end-of-life sensing input lamp voltage feedback input reference current setting lamp current feedback compensation high frequency (HF) oscillator timing capacitor preheat and fault timing capacitor dimming function input UBA2016A and UBA2015A UBA2015
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Objective data sheet
Rev. 1 -- 20 May 2011
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NXP Semiconductors
UBA2016A/15/15A
600 V fluorescent lamp driver
Pin description ...continued Pin 10 10 11 12 13 14 15 16 17 18 19 20 Description boost function input UBA2016A preheat frequency setting combined with enable UBA2015 and UBA2015A PFC feedback input PFC output voltage feedback compensation PFC auxiliary winding input PFC gate driver output ground supply HB low-side switch gate driver output HB high-side source connection HB floating supply connection HB high-side switch gate driver output
Table 3. Symbol BOOST PH/EN FBPFC COMPPFC AUXPFC GPFC GND VDD GLHB SHHB FSHB GHHB
7. Functional description
7.1 Introduction
The UBA2016A/15/15A is an integrated circuit for electronically ballasted fluorescent lamps. It provides a critical conduction mode Power Factor Correction (PFC) controller/driver and a half-bridge controller/driver with all the necessary functions for correct preheat, ignition and on-state operation of the lamp. Several protection mechanisms are incorporated to ensure the safe operation of the fluorescent lamp or a shut down of the complete ballast under any abnormal operating conditions or lamp failure.
7.2 Power Factor Correction (PFC)
The PFC is a boundary conduction mode, on-time controlled system. The basic application diagram can be found in Figure 6. This type of PFC operates at the boundary between continuous and discontinuous mode. Energy is stored in the inductor LPFC each period that switch QPFC is on. When the input current Ii(PFC) is zero at the moment that QPFC is switched on, the amplitude of the current build up in LPFC will be proportional to Vi(PFC) and the time ton(PFC) that QPFC is on. This current continues to flow as output current Io(PFC) via DPFC into CBUS after QPFC is switched off. In this phase Io(PFC) is equal to Ii(PFC). A new cycle is started when Io(PFC) reaches zero. Ii(PFC) consists of a sequence of triangular pulses, each having an amplitude proportional to the input voltage and ton(PFC). If ton(PFC) is kept constant, the first harmonic of the input current is proportional to the input voltage. The PFC output voltage Vo(PFC) is controlled by ton(PFC). As ton(PFC) is more slowly regulated than the mains frequency it will not disturb the power factor.
UBA2016A_15_15A
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(c) NXP B.V. 2011. All rights reserved.
Objective data sheet
Rev. 1 -- 20 May 2011
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NXP Semiconductors
UBA2016A/15/15A
600 V fluorescent lamp driver
VDSRmains
Dbypass
Vo(PFC) li(PFC)
DPFC
lo(PFC)
LPFC
Iswitch(PFC) R1 QPFC
mains
R3 R2
CBUS
GPFC AUXPFC
C1
FBPFC
COMPPFC
R4
UBA2016A UBA2015 UBA2015A
GND
VDD
C2
001aam533
Fig 6.
Basic PFC application diagram
7.2.1 Regulation loop
The control loop senses the PFC output voltage via resistors R1, R2 and the feedback input FBPFC. The frequency compensation network C1, C2 and R4 sets the response time and stability of the loop. The voltage at pin FBPFC is regulated to Vreg(FBPFC). When voltage on pin FBPFC is above the regulation voltage, pin COMPPFC is charged and when voltage on pin FBPFC is lower, pin COMPPFC is discharged. Current flow through pin COMPPFC is controlled by the PFC Operational Transconductance Amplifier (OTA) and its transconductance gm(PFC). The voltage on pin COMPPFC controls the PFC on-time, ton(PFC). So when the voltage at pin FBPFC is too high, ton(PFC) is reduced and less energy is transferred. When voltage at pin FBPFC is too low, ton(PFC) is increased and more energy is transferred. The voltage on pin FBPFC is sampled at the rising edge of pin GPFC and held internally during the leading edge blanking time tleb(FBPPC) before going to the OTA to prevent disturbance of the regulation level due to transition effects when the PFC external power switch is turned on The maximum ton(PFC) is set when the voltage at pin COMPPFC is clamped to Vclamp(COMPPFC) to limit the dead time in recovering regulation after a regulation range overshoot. The ton(PFC) time can be regulated down to zero. The moment at which the gate is turned on is determined by pin AUXPFC. When this pin is below demagnetization detection voltage Vdet(demag)AUXPFC and the low PFC off-time toff(PFC)low timer is finished, the next cycle starts. During start-up, the capacitor connected to pin COMPPFC is connected by an internal switch to pin FBPFC which allows it to partially charge before the PFC starts. This reduces the start-up time.
UBA2016A_15_15A All information provided in this document is subject to legal disclaimers. (c) NXP B.V. 2011. All rights reserved.
Objective data sheet
Rev. 1 -- 20 May 2011
7 of 42
NXP Semiconductors
UBA2016A/15/15A
600 V fluorescent lamp driver
7.2.2 Protection
The PFC incorporates the following protection mechanisms:
* When voltage on pin FBPFC drops below open/short protection threshold voltage
Vth(osp)(FBPFC), the gate is turned off and the start of a new cycle is inhibited. A small internal filter prevents this protection reacting to a negative spike.
* When pin FBPFC is left open, a pull-down bias current Ibias(FBPFC) ensures that the pin
voltage drops below Vth(osp)(FBPFC).
* When voltage at pin FBPFC rises above overvoltage threshold voltage Vth(ov)(FBPFC)
the gate immediately turns off. A new cycle will not start while VFBPFC remains above Vth(ov)(FBPFC). This limits the PFC output voltage. This protection is disabled during the leading edge blanking time tleb(FBPFC) after GPFC goes high.
* When the toff(PFC)low timer sequence has ended with no demagnetization detected
(VAUXPFC has not risen above Vdet(demag)) the on-time of the next cycle will be the no demagnetization detected PFC on-time ton(PFC)nodemag to prevent excessive current build up in the coil.
* Bias current Ibias(AUXPFC) ensures that pin AUXPFC is HIGH when not connected
ensuring pin GPFC stays LOW.
7.3 Half-bridge driver
The IC incorporates drivers for the half-bridge switches and all related circuits such as non-overlap, high voltage level shifter, bootstrap circuit for the floating supply and hard switching and capacitive mode detection. The UBA2016A/15/15A is designed to drive a half-bridge inverter with an inductive load. The load consists typically of an inductor with a resonant capacitor and a TL or CFL. A basic half-bridge application circuit driving a TL is shown in Figure 7 which also shows a typical IC supply configuration with a start-up bleeder resistor and a dV/dt supply.
VBUS
VDD GHHB
UBA2016A UBA2015 UBA2015A
SHHB FSHB GLHB
GND
001aam534
Fig 7.
Basic half-bridge and IC supply connection diagram
UBA2016A_15_15A
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(c) NXP B.V. 2011. All rights reserved.
Objective data sheet
Rev. 1 -- 20 May 2011
8 of 42
NXP Semiconductors
UBA2016A/15/15A
600 V fluorescent lamp driver
7.3.1 VDD supply
The UBA2016A/15/15A is intended to be supplied by a start-up bleeder resistor connected between the bus voltage VBUS and VDD and a dV/dt supply from the half-bridge point at pin SHHB. The IC starts up when the voltage at pin VDD rises above start-up voltage Vstartup(VDD) and locks out (stops oscillating) when the voltage at pin VDD drops below stop voltage Vstop(VDD). The hysteresis between the start and stop levels allows the IC to be supplied by a buffer capacitor until the dV/dt supply is settled. The UBA2016A/15/15A has an internal VDD clamp. This is an internal active Zener (or shunt regulator) that limits the voltage on the VDD supply pin to clamp voltage Vclamp(VDD). No external Zener diode is needed in the dV/dt supply circuit if the maximum current of the dV/dt supply minus the current consumption of the IC (mainly determined by the gate drivers' load) is below Iclamp(VDD).
7.3.2 Low- and high-side drivers
The low- and high-side drivers are identical. The output of each driver is connected to the equivalent gate of an external power MOSFET. The high-side driver is supplied by the bootstrap capacitor, which is charged from the VDD supply voltage via an internal diode when the low-side power MOSFET is on. The low-side driver is directly supplied by the VDD supply voltage.
7.3.3 Non-overlap
During each transition between the two states GLHB HIGH/GHHB LOW and GLHB LOW/GHHB HIGH, GLHB and GHHB will both be LOW for a fixed non-overlap time tno to allow the half-bridge point to be charged or discharged by the load current (assuming the load always has an inductive behavior), and enabling zero voltage switching; see Figure 8.
UBA2016A_15_15A
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(c) NXP B.V. 2011. All rights reserved.
Objective data sheet
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UBA2016A/15/15A
600 V fluorescent lamp driver
tno
VCF 0 VSHHB + VVDD VGHHB VSHHB VVDD time time
VGLHB 0 VBUS time
VSHHB 0
001aam537
time
Fig 8.
Oscillator, driver and half-bridge voltages
7.4 Fluorescent lamp control
The IC incorporates all the regulation and control needed for the fluorescent lamp(s), such as filament preheat, ignition frequency sweep, lamp voltage limitation, lamp current control, start-up boost, dimming, end-of-life detection, overcurrent protection and hard switching limiting. In the UBA2016A/15/15A, 7 different operating states can be distinguished. In each state the IC acts in a specific way, as described in the next paragraphs. Figure 9 shows the possible transitions between the states with their conditions.
UBA2016A_15_15A
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(c) NXP B.V. 2011. All rights reserved.
Objective data sheet
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UBA2016A/15/15A
600 V fluorescent lamp driver
Power on Supply voltage definitions reset = (VDD < Vrst(VDD)) restart = (VDD < Vrestart(VDD)) VDD low = (VDD < Vstop(VDD)) VDD high = (VDD > Vstartup(VDD))
reset OR disable GLHB AND (reset OR disable)
Reset state GLHB low stop latch and ignition attempt counter are reset reset NOT(reset)
Stop state GLHB low
GLHB AND (VDD low OR overtemp)
Standby state GLHB high
restart
Auto-restart state GLHB low
VDD high AND enable AND NOT(overtemp)
Non oscillating states (IC is off) Low power consumption GHHB and GPFC low Oscillating states (IC is on)
fast fault
Preheat state BOOST and EOL disabled frequency is decreased until HB preheat current or the set value for the preheat frequency (UBA2015(A) only) is reached
fault timeout AND (ignition attempts = 1)
Preheat time completed
fault timeout AND (ignition attempts = 2)
Ignition state BOOST and EOL disabled frequency is decreased as long as no lamp overvoltage or HB overcurrent or hardswitching(1) is detected (1)(UBA2016(A) only)
f low OR ignition detected
fault timeout
Burn state ignition attempt counter is reset BOOST function enabled EOL protection enabled Frequency determined by lamp current regulation loop
fault definitions: overtemp = {set} T > Tth(act)otp {reset} T < Tth(rel)otp fast fault = over voltage extra OR capacitive mode(1) OR (over current lamp AND f high) coil saturation(2) slow fault = CPT low OR VFB low OR NOT(PFC OK) OR over voltage OR (over voltage end of life AND NOT (deep dimming))(2) OR coil saturation OR hardswitching OR brownout OR asymetrical end of life(2) the fault timer is started by slow fault and runs as long as slow fault continues. NOT(slow fault) resets the fault timer.
Other definitions: enable = (VFFPRHT > Vth(en)(FFPRHT)) disable = NOT(enable) ignition detected = (VIFB > Vth(lod)(IFB)) AND (VVFB < Vth(lod)(VFB))
(1)(except for UBA2016A in IGNITION state after ZVS
has been seen)
(2)(BURN state only) 001aam538
Fig 9.
State diagram
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UBA2016A_15_15A
Objective data sheet
Rev. 1 -- 20 May 2011
11 of 42
NXP Semiconductors
UBA2016A/15/15A
600 V fluorescent lamp driver
7.4.1 Reset
When voltage on pin VDD is below the reset voltage Vrst(VDD), both gates of the half-bridge driver are LOW. All internal latches are reset. When voltage on pin VDD rises above Vrst(VDD), the IC will enter STANDBY state.
7.4.2 Standby
In STANDBY state the low-side gate driver is on (GLHB is HIGH).The floating supply capacitor CFSHB is then charged. When the VDD voltage rises above Vstartup(VDD), the Preheat state is entered.
7.4.3 Oscillating states (Preheat, Ignition and Burn)
The highest and lowest oscillation frequency can be set with capacitor CCF connected to the CF pin. The oscillator is implemented in such a way that the lowest frequency fsw(low) is the most accurate. In any oscillating state (Preheat, Ignition or Burn), when VDD voltage drops below Vstop(VDD) or overtemperature is detected, the half-bridge stops oscillation when GLHB is HIGH and enters the STANDBY state.
7.4.4 Preheat
The oscillating frequency starts at fsw(high) (see Figure 10 "Resonance curve application with UBA2015A" or Figure 11 "Resonance curve application with UBA2016A" point A) and remains at that frequency until the PFC output is sufficient (the voltage at pin FBPFC rises above the PFC voltage OK threshold voltage on pin FBPFC, Vth(VPFCok)FBPFC) and the voltages at pins CPT and VFB settle above their pin short protection levels (VVFB > Vth(osp)(VFB) and VCPT > Vth(scp)(CPT)). The half-bridge current is regulated when in the Preheat state; see Figure 10 "Resonance curve application with UBA2015A" or Figure 11 "Resonance curve application with UBA2016A" point B. Pin CIFB supplies a current Ich(CIFB) to the externally connected compensation network on this pin and its voltage will rise. This will cause the switching frequency to decrease (pin CIFB is the input for the voltage controlled oscillator). This will cause an increase in half-bridge current (assuming the switching frequency is higher than the load resonance frequency). This current is measured via pin SLHB using a resistor connected between the source of the low-side switch and ground. When the voltage on pin SLHB rises above the preheat current control voltage Vcrtl(ph)SLHB, discharge current Idch(CIFB) to pin CIFB and the frequency is increased. When the voltage drops below Vth(ocp)SLHB, current Ich(CIFB) from pin CIFB causes the frequency to decrease.
UBA2016A_15_15A
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(c) NXP B.V. 2011. All rights reserved.
Objective data sheet
Rev. 1 -- 20 May 2011
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NXP Semiconductors
UBA2016A/15/15A
600 V fluorescent lamp driver
(1)V lamp
(1) (2)I lamp
(2)
Vign E Ilamp(nominal) D
C
B
A H fsw(reg) fsw(low) fsw(ign) fsw(dim) fsw(ph) fsw(high)
001aan202
f
(1) Lamp voltage when lamp is off (not ignited yet). (2) Lamp current when lamp is on.
Fig 10. Resonance curve application with UBA2015A
(1)Vlamp
(1) (2)I lamp
(2)
G Vign F E Ilamp(nominal) D
C
B
H fsw(bst)(reg) fsw(bst)(low) fsw(low) fsw(reg) fsw(ign) fsw(dim) fsw(ph)
A fsw(high) f
001aan204
(1) Lamp voltage when lamp is off (not ignited yet). (2) Lamp current when lamp is on.
Fig 11. Resonance curve application with UBA2016A
UBA2016A_15_15A
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(c) NXP B.V. 2011. All rights reserved.
Objective data sheet
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NXP Semiconductors
UBA2016A/15/15A
600 V fluorescent lamp driver
The preheat frequency for UBA2015 and UBA2015A can also be regulated via pin PH/EN. UBA2015 and UBA2015A support current controlled preheat and fixed frequency preheat. During preheat the output voltage of pin PH/EN is Vph(PH/EN). The output current that an external resistor Rext(PH/EN) connected to this pin sinks is compared to 45 of the output current of the VCO (the current at pin CF with no fault condition present and the capacitor at that pin being charged minus the same current at fsw(low)). As long as the output current of the VCO is bigger the frequency is being decreased (by charging pin CIFB with Ich(CIFB)). If the current through the external resistor is bigger the frequency will be increased (by discharging pin CIFB with Idch(CIFB)). Current and fixed frequency control mechanisms are active at the same time. For fixed frequency preheat using pin PH/EN, the half-bridge current sense resistor connected to pin SLHB should be small enough not the activate the current control mechanism. If current controlled preheat is used, pin PH/EN should be left open (except of course for the open collector or open drain that drives the enable function). The preheat time tto(ph) can be set with capacitor CCPT on pin CPT.
7.4.5 Ignition
After the Preheat state the IC enters the Ignition state. During the Ignition state the switching frequency is decreased by charging pin CIFB with Ich(CIFB). This will result in increasing lamp voltage until the lamp ignites (see point C in Figure 10 "Resonance curve application with UBA2015A" or Figure 11 "Resonance curve application with UBA2016A") and lamp-on or fsw(low) (lowest frequency) is detected. Lamp-on detection occurs when the average absolute voltage on pin IFB is above lamp-on detection threshold Vth(lod)(IFB) and the voltage on pin VFB is more then 50 % of each clock cycle below the lamp-on detection threshold Vth(lod)(VFB) and after a delay td(lod). If either saturation, overvoltage or hard switching regulation (UBA2016A only) is triggered it will overrule the frequency sweep down and hold the frequency at the border where the fault appeared and start the fault timer. When the fault timeout tto(fault) is reached the IC enters Auto-restart state if it was the first ignition attempt, otherwise it will go to the Stop state; see Figure 9 "State diagram".
7.4.6 Auto-restart
The Auto-restart state is entered after a fault time out in the Ignition state during the first ignition attempt. See Figure 9 "State diagram". When the IC is in Auto-restart state, it draws supply current Irestart(VDD). This will slowly discharge the buffer capacitor on pin VDD until the voltage on this pin drops below Vrestart(VDD). The IC then enters the Standby state. Here the VDD capacitor will be charged again to start a second ignition attempt. The bleeder current must be between standby current Istb(VDD) and Irestart(VDD). A time delay can be set between the two ignition attempts with the capacitor at pin VDD to reduce stress on the HB components.
7.4.7 Burn
In Burn state the lamp current regulation and all protection circuits are active. The boost function (available in UBA2016A only) is also enabled.
UBA2016A_15_15A
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(c) NXP B.V. 2011. All rights reserved.
Objective data sheet
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UBA2016A/15/15A
600 V fluorescent lamp driver
7.4.7.1
Lamp current control and dimming The AC lamp current is sensed by an external resistor connected to pin IFB. The resulting AC voltage on pin IFB is internally Double-Side Rectified (DSR), and compared to a reference level by an OTA. This reference level is determined by the internal reference regulation level Vreg(ref) and the voltage on the DIM input (UBA2015A and UBA2016A only), as shown in Figure 12 "Lamp current control". Definition: the regulation voltage on pin IFB (Vreg(IFB)) is the level seen from outside the IC to which the IC will try to regulate the average absolute voltage on pin IFB. If the DIM input is not present or not connected or VDIM > Vreg(ref) then Vreg(IFB) is Vreg(ref) + non-idealities from the OTA and the DSR else Vreg(IFB) = VDIM + non-idealities from OTA and DSR. For the UBA2016A Vreg(IFB) also depends on the input current on pin BOOST (IBOOST). The boost current is multiplied and added to the OTA output current which translates to an extra voltage being added to Vreg(ref). See Section 7.4.7.3 "Boost" for further detail about the boost function. For the remainder of this Section we will assume IBOOST = 0. For the UBA2015A and UBA2016A the DIM input controls the lamp current set point. The DIM input level is internally clamped to Vreg(ref). The lowest possible DIM input level is set by the bias current on pin DIM Ibias(DIM) and the external resistance on the pin. If no dimming is required, pin DIM can be left open or connected via a capacitor to ground. The internal current source Ibias(DIM) will then charge the pin until it is internally clamped to Vreg(ref).
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Ilamp
DOUBLE SIDE RECTIFIER
VDD
OTA
gm(IFB)
CIFB IFB
Cext(CIFB)
Rext(IFB)
Ri(IFB)
VOLTAGE CONTROLLED OSCILLATOR VDD
Ibias(DIM)
VDD
DIM
Vreg(ref)
VDD
Ich(low)(CF)
VDD 1 3.5
VOLTAGE CONTROLLED CURRENT SOURCE
IBOOST
BOOST
Vhigh(CF)
1
1
7.8 /2 clock
grey circuit parts are not present in some types
CF
Cext(CF)
001aan205
Fig 12. Lamp current control
The output of the OTA is connected to pin CIFB. The external capacitor Cext(CIFB) is charged and discharged according to the voltage on the OTA inputs and the transconductance of the OTA, gm(IFB) according to the formula: ICIFB = gm(IFB) x (VIFB - Vreg(IFB). More components can be connected to pin CIFB to improve the response time and stability of the lamp current control loop. Pin CIFB is connected to the input of the VCO (Voltage Controlled Oscillator) that determines the frequency of the IC. Pin CIFB voltage is inversely proportional to the switching frequency. When the load is inductive, an increase in frequency decreases the lamp current, and a decrease in frequency increases the lamp current. With the closed loop for the lamp current in place, the IC will regulate to the required frequency for the desired lamp current. So when the IC enters Burn state it will go to either point D or H shown in Figure 10 (UBA2015A) or Figure 11 (UBA2016A) depending on the DIM input voltage.
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However, the switching frequency can never go below fsw(low) (unless for UBA2016A when the boost function is active, see Section 7.4.7.3). If the regulation level is not reached at fsw(low) the IC will stay at fsw(low) (point E in Figure 10 and Figure 11). 7.4.7.2 Operation without lamp current control To operate the lamp without current control the lamp current sense pin IFB must be connected to ground. The lamp now operates at the lowest frequency fsw(low) (point E in Figure 10 or Figure 11). Dimming is not supported in this case. 7.4.7.3 Boost The boost feature is available only in the UBA2016A to support shorter run up times. The boost function changes the half-bridge switching frequency by lowering the lowest possible switching frequency from fsw(low) to fsw(bst)(low) and increasing the lamp current set point Vreg(IFB) by adding a multiple of the boost current to the OTA output current which translates to an extra voltage being added to Vreg(ref). During boost time, the frequency is lowered, and as a consequence of the inductive load the lamp current is increased. The implementation of the boost function is shown in Figure 12 "Lamp current control". The boost input is a current input with an input range of 0 to Isat(BOOST). The input current is internally clamped at Isat(BOOST). If the input current at the pin is above Isat(BOOST) the effect will not become bigger. The voltage on the pin is determined by the voltage drop across the internal current mirror input and limited by an internal clamp circuit if the input current at the pin rises above Isat(BOOST). For maximum current allowed into the pin; see Table 4. An example of how boost function can be implemented is shown in Figure 13.
Vo(PFC)
Rhv
CBUS
Chv
UBA2016A
RBOOST
BOOST
Dreset
Cboost
Rbias 001aam539
Fig 13. Boost application example; UBA2016A
The boost current is determined by resistor RBOOST. Rbias provides a small threshold for the boost function and with capacitor CBOOST keeps the BOOST pin at a defined (inactive) level (0 V) during normal lamp operation (after the boost period). The boost time constant is reflected by the sum of capacitors Chv and CBOOST and RBOOST. Resistor Rhv and capacitor CBOOST filter out the ripple on Vo(PFC). An example of component values for Vo(PFC) = 430 V is: Rhv = 22 M (500 V); Chv = 100 nF (500 V); Dreset = 1N4148; CBOOST = 150 nF (63 V); RBOOST = 10 M and Rbias = 10 M.
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The amount of boost depends on the current into the BOOST pin and the lamp current control. If the application does not use lamp current control, the switching frequency will go down to the lowest possible boost switching frequency fsw(bst)(low) (point G in Figure 11 "Resonance curve application with UBA2016A") that is determined by Equation 1 or Equation 2, depending on the value of IBOOST. 0 I BOOST I sat ( BOOST ) f sw ( bst ) ( low ) = f sw ( low ) ( 1 - I BOOST N f ( bst ) ( low ) ) I BOOST > I sat ( BOOST ) f sw ( bst ) ( low ) = f sw ( low ) ( 1 - I sat ( BOOST ) N f ( bst ) ( low ) ) (1) (2)
If the application uses lamp current control, the switching frequency is regulated to boost regulation voltage on pin IFB, Vreg(bst)(IFB) (point F in Figure 11 "Resonance curve application with UBA2016A") that can be calculated by Equation 3 or Equation 4, (depending on the value of IBOOST) if the switching frequency remains above fsw(bst)(low), otherwise the switching frequency is fsw(bst)(low); see Equation 1 or Equation 2. 0 I BOOST I sat ( BOOST ) V reg ( IFB ) ( I BOOST ) = V reg ( IFB ) ( 1 + I BOOST N l ( bst )reg ) I BOOST > I sat ( BOOST ) V reg ( bst ) ( IFB ) = V reg ( IFB ) + I sat ( BOOST ) N Vreg ( bst ) (3) (4)
7.4.8 Stop state
When in Stop state the IC is off and all driver outputs are low. The IC will remain in Stop state until the voltage on pin VDD drops below Vrst(VDD) or it is disabled, in which case it will go to Reset state. The sequence of events for entering the Stop state are shown in Figure 9 "State diagram".
7.5 Enable and Disable
The enable function is only available in the UBA2015 and UBA2015A and works via pin PH/EN. If this pin is pulled below the enable voltage Ven(PH/EN) then the IC goes into the Standby state (immediately if GLHB is high, otherwise it will continue its normal clock cycle until GLHB is high and then go to the Standby state). The external interface with pin PH/EN for the enable signal should be an open collector or open drain type driver. To enable the IC the open collector or open drain should be open (high ohmic) to not disturb the fixed frequency preheat setting function of pin PH/EN. In Restart, Standby and Stop states the standby pull-up current source Ipu(stb)(PH/EN) will pull the voltage at pin PH/EN above Ven(PH/EN). In Preheat, Ignition and Burn states the normal output voltage driver of the IC will pull the pin high. In those cases the external driver must draw a current Iclamp(PH/EN) from the pin to disable the IC.
7.6 Protection circuits
7.6.1 End-of-life rectifying lamp detection
If voltage on pin EOL is below low threshold voltage Vth(low)EOL or above Vth(high)EOL the fault timer will start. These threshold voltage levels are related to pin FBPFC voltage according to the formula: Vth(low)EOL = VFBPFC = Vth(high)EOL / 2. The FBPFC voltage is sampled during GPFC low and hold during GPFC high periods to prevent disturbance of the EOL levels due to the switching of the PFC.
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A programmable end-of-life window is achieved by the internal bias current sink Ibias(EOL). The effective relative size of the EOL window will decrease in line with the increasing series resistance connected to pin EOL. The end-of-life lamp rectifying detection is only active during the Burn state.
7.6.2 End-of-life overvoltage detection
This protection is intended to protect against symmetrical lamp aging. When in Burn state the voltage on pin VFB exceeds the overvoltage end-of-life threshold voltage Vth(oveol)(VFB) by more then 50 % of each switching cycle the fault timer will start. Vth(oveol)(VFB) is related to the regulation voltage on pin IFB Vreg(IFB) that itself is dependent on the voltage on pin DIM (see Section 7.4.7.1 "Lamp current control and dimming") according to the formula: Vth(oveol)(VFB) = a - b x Vreg(IFB) Parameters a and b can be calculated from the Vth(oveol)(VFB) values given in Table 6. The end-of-life overvoltage protection is only active during Burn state and (for UBA2015A and UBA2016A) if the voltage at pin DIM is above the overvoltage end-of-life enable voltage Ven(oveol)(DIM).
7.6.3 Capacitive mode detection
Under all normal operating conditions the half-bridge switching frequency should be higher than the load resonance frequency. The load then shows an inductive behavior in that the load current Iload lags behind the half-bridge voltage VSHHB. If the amplitude and the phase difference are large enough, the load current will charge any capacitance on pin SHHB during the non-overlap time tno(LH), and discharge it during the other non-overlap time tno(HL). As a result the voltage across the switches is almost zero at the moment they turn on. This is called zero voltage switching; see Figure 14 "Switching". Zero voltage switching provides the highest switching efficiency and the least Electromagnetic Emission (EME). Capacitive mode switching can occur when, due to any abnormal condition, the switching frequency is below the load resonance frequency. This can happen when the lamp is removed. The load current will then keep the backgate diode of the switch that is switched off conducting during the non-overlap time, and if the other switch is turned on, a sudden step of the half-bridge voltage to the other supply rail takes place (which causes huge current spikes). Also cross conduction between the switches can occur during the reverse recovery of the backgate diode. These effects put huge stress on the power switches, most of which can only handle capacitive mode switching a few times before they break down. To protect against capacitive mode switching the IC monitors pin SHHB during the non-overlap time tno(LH) between switching off of the low-side switch and switching on of the high-side switch. If a rise of VSHHB (dVSHHB/dt > Vth(cm)(SHHB)) during tno(LH) is not detected then the IC will conclude that capacitive mode switching is occurring during the next full cycle. If capacitive mode is detected longer than the fault activation delay time tdet(fault) then the IC will enter Stop state. Capacitive mode detection is active in all oscillating states for all ICs except in the Ignition state of the UBA2016A if zero voltage switching has been observed. In that case the UBA2016A switches to hard switching regulation, see Section 7.6.4 "Hard switching regulation (UBA2016A)".
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During ignition a situation may occur where the amplitude of the load current is high and the half-bridge is at the boundary of capacitive mode switching; see Figure 14 "Switching". The load current crosses zero during the non-overlap time. If the amplitude of the load current is large enough, the UBA2015 and UBA2015A might not detect capacitive mode because VSHHB did rise before going down again. The backgate diode of one switch is conducting again when the other switch switches on. Since this can only happen if the load current crosses zero during the non-overlap time, the momentary value of the load current at the end of the non-overlap time will be not so big, and will not necessarily damage the switches. Depending on the topology used, the DC blocking capacitor might be charged via the lamp(s) at the moment the lamp(s) ignite. This will cause a temporary DC current addition to the load current that might be interpreted by the UBA2015 and UBA2015A as capacitive mode switching. If this happens the DC blocking capacitor must be reduced or pre-charged. The UBA2016A does not have this problem.
7.6.4 Hard switching regulation (UBA2016A)
In Ignition state the UBA2016A capacitive mode detection is disabled and replaced by hard switching regulation. This enables ignition without voltage feedback. The hard switching regulation measures the voltage step on pin SHHB at the end of the non-overlap time tno(LH) (Vstep(SHHB) in Figure 14 "Switching") and increases the switching frequency by discharging pin CIFB with a current according to the formula: Idch(hswr)CIFB = (Vstep(SHHB) - Vth(hswr)SHHB) x gm(hswr) In this way the IC keeps the switching frequency during ignition at the point where there is still a small phase difference between the load current and the half-bridge voltage, and the switching losses due to hard switching are limited. This is assuming that it is not already held at the higher frequency by the overvoltage protection or coil saturation protection. As Figure 14 "Switching" shows, hard switching also occurs when the amplitude of the load current is to small. This might happen when the IC enters Ignition state at the end of preheat and the frequency is still relatively high. To prevent the IC from getting stuck at fhigh the hard switching regulation is disabled until zero voltage switching has been observed, that is if Vstep(SHHB) < Vth(zvs)SHHB.
7.6.5 Hard switching protection
The hard switching level Vstep(SHHB) step is measured via pin SHHB. The hard switching level is determined by measuring the voltage step on pin SHHB on the rising edge of pin GHHB; see Figure 14 "Switching". When Vstep(SHHB) is above the hard switching protection threshold voltage on pin SHHB (Vth(hswp)SHHB) the fault timer is activated.
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xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx x x x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xx xx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxx x x xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxx xxx
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VFSHB HV VGHHB VSHHB GHHB SHHB Iload SENSE VHV GLHB low side switch VSHHB GND Vstep(SHHB)
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high side switch VDD VGLHB GND
tno(LH)
tno(HL)
GND
zero voltage switching hard switching (due to small phase difference between VSHHB and iload) hard switching (due to small amplitude of iload) boundary of capacitive mode switching capacitive mode switching
001aan209
UBA2016A/15/15A
Iload
600 V fluorescent lamp driver
0
Fig 14. Switching
NXP Semiconductors
UBA2016A/15/15A
600 V fluorescent lamp driver
7.6.6 Coil saturation protection
When the peak voltage on pin SLHB exceeds saturation threshold voltage Vth(sat)SLHB, an additional current Iadd(CF) is sourced to pin CF to shorten the running oscillator cycle. In Ignition state the fault timer is started and a discharge current Idch(CIFB) is drawn from pin CIFB during the next cycle to increase the switching frequency. In Burn state the IC will go to Stop state if coil saturation is detected longer than the saturation detection delay time td(det)sat. Current Ibias(SLHB) is sourced to pin SLHB which will force the controller into coil saturation protection if pin SLHB is left open.
7.6.7 Lamp overcurrent protection
If voltage on pin IFB exceeds the overcurrent detection threshold voltage Vth(ocd)(IFB), and the oscillator is running at fsw(high), an overcurrent is detected and the IC will immediately enter the Stop state.
7.6.8 Lamp overvoltage protection
When the peak voltage on pin VFB exceeds Vth(ov)(VFB), the fault timer is started and a discharge current Idch(CIFB) is drawn from pin CIFB during the next cycle to increase the switching frequency. When VVFB > Vth(ovextra)(VFB) for longer than the fault activation delay time tdet(fault) then the IC will enter the Stop state.
7.6.9 Lamp removal detection
Removing the lamp from applications that have the resonant capacitor connected via the lamp filaments, will result in hard switching because current cannot flow through the ballast inductor. If hard switching is detected during Ignition or Burn state the fault timer will be started. For applications with the resonant capacitor connected directly to the ballast inductor, capacitive mode, coil saturation or over voltage will be detected. Capacitive mode is activated if the switching frequency ends up below the resonance frequency due to removal of the lamp. If the switching frequency is near or above the resonance frequency, the lamp (or rather the lamp socket) voltage and half-bridge current will be very high due to the unloaded resonant circuit (lamp inductor and lamp capacitor) which activates the coil saturation protection or the overvoltage protection.
7.6.10 Temperature protection
When the temperature is above Tth(act)otp and GLHB is high, the IC enters Standby state. The IC cannot exit the Standby state until the temperature drops below Tth(rel)otp.
7.6.11 Fault timer
Any fault that starts the fault timer must be detected for longer than the fault activation delay time td(act)fault to actually start the timer. When the timer is started, the capacitor at pin CPT is alternately being charged and discharged. After 8 charging and 7 discharging cycles the fault time-out period tto(fault) is reached and the IC enters either the Stop state or the Auto-restart state, depending on the fault detected, the current state of the timer and the number of ignition attempts; see Figure 9 "State diagram". If the fault that started the
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timer is no longer detected for a period longer than the fault release delay time td(rel)fault, the fault timer will be reset and at any new occurance of the fault, the timer will start from zero. Faults which activate the fault timer are shown as SlowFault in Figure 9 "State diagram". The fault timer uses the same pin (CPT) to set the time with an external capacitor Cext(CPT) as the preheat timer. The ratio between the preheat time-out time tto(ph) and the fault time-out time tto(fault) can be changed by adding an external series resistor Rs(ext)(CPT) or an external parallel resistor Rp(ext)(CPT) to the external capacitor Cext(CPT); see Figure 15 "CPT connections".
CPT
CPT
CPT
Rs(ext)(CPT)
Cext(CPT)
Rp(ext)(CPT)
Cext(CPT) Cext(CPT)
smaller ratio tto(ph)/tto(fault)
default ratio tto(ph)/tto(fault)
larger ratio tto(ph)/tto(fault)
001aan210
Fig 15. CPT connections
The fault timer incorporates a protection that ensures safe operation conditions if the CPT pin voltage is below Vth(scp)(CPT) (shorted to GND) by holding the oscillation frequency at fsw(high).
7.6.12 Brownout protection
Brownout protection is designed to maintain stable and safe lamp operation during dips in mains supply. Without this protection the current demand from the bus voltage to maintain constant lamp power would increase upon a drop in bus voltage. This creates an unstable situation with the mains input voltage dropping and the PFC reaching its regulation range limit. Brownout protection reduces the lamp power when the PFC is out of regulation. This situation is only allowed for a limited time to prevent excessive component stress. When the PFC is outside its regulation range and the bus voltage is still too low (VCOMPPFC = Vclamp(COMPPFC) and VFBPFC < Vreg(FBPFC)), a brownout current Ibo(CF) is added to the charge current at pin CF, thus increasing the fsw(low). A discharge brownout current Idch(bo)(CIFB) is also drawn from pin CIFB. Both Ibo(CF) and Idch(bo)(CIFB) are proportional to the difference between VFBPFC and Vreg(FBPFC). If VFBPFC < Vth(bo)(FBPFC) the fault timer will start. The start-up bleeder resistor and the regulation range of the PFC should be dimensioned in such a way that if the fault timer times out on brownout protection and the IC enters Stop state, the input mains voltage is too low to support the standby current of the IC via the bleeder resistor. The IC will then automatically reset and start-up in normal mode (and reignite the lamps) when the mains voltage has returned to normal.
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8. Limiting values
Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). All voltages referenced to signal ground (GND pin 15); current flow into the IC is positive. Symbol General Rref(IREF) SR Tamb Tj Tstg Voltage VFSHB voltage on pin FSHB continuous t < 0.5 s with respect to VSHHB VGHHB VGLHB VGPFC VVDD VAUXPFC VEOL VSLHB VIFB VDIM VFBPFC VBOOST VPH/EN VVFB Current IVDD IEOL ISLHB IBOOST IAUXPFC current on pin VDD current on pin EOL current on pin SLHB current on pin BOOST current on pin AUXPFC -1 -1 -50 -1 50 +1 +1 +50 +1 mA mA mA A mA voltage on pin GHHB voltage on pin GLHB voltage on pin GPFC voltage on pin VDD voltage on pin AUXPFC voltage on pin EOL voltage on pin SLHB voltage on pin IFB voltage on pin DIM voltage on pin FBPFC voltage on pin BOOST voltage on pin PH/EN voltage on pin VFB with respect to VSHHB 0 0 -0.3 -0.3 -0.3 -0.3 -0.3 -9 -9 -9 -5 -0.1 -0.1 -0.3 -0.1 -0.1 570 630 +14 +14 +14 +14 +14 +9 +9 +9 +5 +5 +5 +2.2 +5 +5 V V V V V V V V V V V V V V V V reference resistance on pin IREF slew rate ambient temperature junction temperature storage temperature pins FSHB, GHHB and SHHB 30 -4 -40 -40 -55 36 +4 +125 +150 +150 k V/ns C C C Parameter Conditions Min Max Unit
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Table 4. Limiting values ...continued In accordance with the Absolute Maximum Rating System (IEC 60134). All voltages referenced to signal ground (GND pin 15); current flow into the IC is positive. Symbol VESD Parameter electrostatic discharge voltage Conditions Human Body Model (HBM) JEDEC Class 2 for pins: SLHB, IFB, EOL, CIFB, CPT, IREF, VFB, CF, DIM, BOOST, PH/EN, FBPFC, COMPPFC, AUXPFC, GPFC, VDD and GLHB JEDEC Class 1C for pins: GHHB, FSHB and SHHB Charge Device Model (CDM) JEDEC Class 2 for pins: SHHB, FSHB, GHHB JEDEC Class 3 for pins: SLHB, IFB, EOL, VFB, IREF, CIFB, CF, CPT, DIM, BOOST, PH/EN, FBPFC, COMPPFC, AUXPFC, GPFC, VDD, GLHB Latch-up Ilu
[1]
Min
Max
Unit
ElectroStatic Discharge (ESD) -2 +2 kV
-1 -200 -500
+1 +200 +500
kV V V
latch-up current
[1]
-100
+100
mA
Positive and negative latch-up currents tested at Tj = 150 C by discharging a 22 F capacitor though a 50 series resistor with a 350 H series inductor. Latch-up current values are in accordance with the general quality specification.
9. Thermal characteristics
Table 5. Symbol Rth(j-a) Thermal characteristics Parameter thermal resistance from junction to ambient Conditions in free air; mounted on a single-sided PCB; SO20 package in free air; mounted on a single-sided PCB; DIP20 package Typ 100 90 Unit K/W K/W
10. Characteristics
Table 6. Characteristics Tamb = 25 C; settings according to default setting[1]; all voltages referenced to GND; current flow into the IC is positive; unless otherwise specified. Symbol High voltage Ileak leakage current VFSHB = 630 V; VGHHB = 630 V; VSHHB = 630 V; VVDD = 0 V 2 A Parameter Conditions Min Typ Max Unit
Start-up Vstartup(VDD) Vstop(VDD) Vhys(VDD) Istb(VDD) Ipu(stb)(PH/EN) Vrst(VDD)
UBA2016A_15_15A
start-up voltage on pin VDD stop voltage on pin VDD hysteresis voltage on pin VDD standby current on pin VDD standby pull-up current on pin PH/EN reset voltage on pin VDD
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11.9 9.6 2.1 VVDD = 11.5 V Standby or Stop state; VPH/EN = 0.25 V 0.20 7.7 3.6
12.4 10.0 2.4 0.24 9 4.2
12.9 10.4 2.7 0.28 10.3 4.8
V V V mA A V
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Table 6. Characteristics ...continued Tamb = 25 C; settings according to default setting[1]; all voltages referenced to GND; current flow into the IC is positive; unless otherwise specified. Symbol Vrestart(VDD) Irestart(VDD) Vclamp(VDD) Iclamp(VDD) IVDD Parameter restart voltage on pin VDD restart current on pin VDD clamp voltage on pin VDD clamp current on pin VDD current on pin VDD VVDD = 9 V IC off; IVDD = 0.33 mA IC off; VVDD = 14.0 V VFBPFC = 1.2 V; VCOMPPFC = 1 V VCOMPPFC = 350 mV VCOMPPFC = Vhigh(COMPPFC) from the start of rising edge on pin GPFC VCOMPPFC = 1.6 V VCOMPPFC = 200 mV Ibias(FBPFC) gm(PFC) bias current on pin FBPFC PFC transconductance VFBPFC = 1.27 V VCOMPPFC = 1.5 V; 1.2 V < VFBPFC < 1.34 V Conditions Min 6.2 0.85 13.0 25 1.2 Typ 6.5 1.10 13.4 45 1.7 Max 6.8 1.35 13.8 2.2 Unit V mA V mA mA
PFC normal operation ton(PFC) ton(PFC)high toff(PFC)low tleb(FBPFC) Vreg(FBPFC) PFC on-time high PFC on-time low PFC off-time leading edge blanking time on pin FBPFC regulation voltage on pin FBPFC 0.70 24 1.7 260 1.23 1.23 4.5 25 0.95 on pin AUXPFC VFBPFC = 1 V 50 2.85 1.0 0.20 1.34 VAUXPFC = 0.1 V VGPFC = 4 V; VVDD = 12 V VGPFC = 2 V; VVDD = 12 V -6 -105 13.5 38.6 CCPT = 100 nF Preheat or Ignition state 0.80 1.78 0.44 1.05 28 2.0 330 1.27 1.28 5.0 30 1.00 100 3.00 1.3 0.25 1.39 -5 -90 16.0 0.94 1.84 0.48 1.40 32 2.3 400 1.31 1.33 5.5 35 1.05 150 3.15 1.6 0.30 1.43 -4 -75 18.5 1.08 1.90 0.52 -7.7 s s s ns V V A A/V V mV V s V V A mA k s V V A
Vth(VPFCok)FBPFC PFC voltage OK threshold voltage on pin FBPFC Vdet(demag) Vclamp(COMPPFC) PFC protection ton(PFC)nodemag Vth(osp)(FBPFC) Vth(ov)(FBPFC) Ibias(AUXPFC) PFC driver Isource(GPFC) Rsink(GPFC) HB preheat Rext(PH/EN) tto(ph) VO(ph)(PH/EN) Vctrl(ph)SLHB Ich(CIFB) external resistor on pin PH/EN preheat time-out time preheat output voltage on pin PH/EN source current on pin GPFC sink resistance on pin GPFC no demagnetization detected PFC on-time open/short protection threshold voltage on pin FBPFC overvoltage threshold voltage on pin FBPFC bias current on pin AUXPFC demagnetization detection voltage clamp voltage on pin COMPPFC
overcurrent protection threshold voltage preheat on pin SLHB charge current on pin CIFB no fault detected; Preheat and Ignition states only; VCIFB = 1.5 V
-10.3 -9.0
UBA2016A_15_15A
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600 V fluorescent lamp driver
Table 6. Characteristics ...continued Tamb = 25 C; settings according to default setting[1]; all voltages referenced to GND; current flow into the IC is positive; unless otherwise specified. Symbol Idch(CIFB) fsw(ph) Parameter discharge current on pin CIFB preheat switching frequency Conditions preheat overcurrent detected; VCIFB = 1.5 V UBA2015; UBA2015A Rext(PH/EN) = 40 k; Cext(CF) = 200 pF Rext(PH/EN) = 100 k; Cext(CF) = 200 pF HB lamp ignition fsw(high)/fsw(low) Vfsw(low)(CIFB) Vth(lod)(IFB) Vth(lod)(VFB) V(Vreg-Vth(lod)) td(lod) fsw(low) Vhigh(CF) Vreg(IFB) high switching frequency to low switching frequency ratio low switching frequency voltage on pin CIFB lamp on detection threshold voltage on pin IFB lamp on detection threshold voltage on pin VFB regulation voltage to lamp-on-detect threshold voltage difference lamp on detection delay time low switching frequency high voltage on pin CF regulation voltage on pin IFB VCIFB = 2 V; VIFB > 0 V VCIFB = 2 V; VDIM = 127 mV; VIFB > 0 V VCIFB = 2 V; VIFB < 0 V VCIFB = 2 V; VDIM = 127 mV; VIFB < 0 V Ich(low)(CF) Vi(IFB) Ri(IFB) Ven(PH/EN) VO(burn)(PH/EN) gm(IFB) IO(clamp)(PH/EN) HB driver Isource(GLHB) Rsink(GLHB) Isource(GHHB)
UBA2016A_15_15A
Min 7.7
Typ 9.0
Max 10.3
Unit A
93 62
97.7 66
102.4 kHz 70 kHz
2.2 1.00 0.9 pin IFB 40 2 CCF = 200 pF 41 20 1.22 77
2.4 3.0 1.11 1.0 160 3 43 2.5 1.27 127
2.6 1.22 1.1 220 4 45 80 1.32 177 V V V mV ms kHz kHz V V mV V mV A V k k V V A/V mA
HB normal operation
-1.34 -1.27 -1.2 -197 -127 47 60 30 0.25 1.27 16.5 -57 +3.1 0.29 1.33 19 0.16
low charge current on pin CF input voltage range on pin IFB input resistance on pin IFB enable voltage on pin PH/EN burn state output voltage on pin PH/EN IFB transconductance output current clamp on pin PH/EN Burn state VCIFB = 2 V Preheat, Ignition or Burn states; VPH/EN = 0.2 V VGLHB = 4 V VGLHB = 2 V VSHHB = 0 V; VGHHB = 4 V VCIFB = 2 V VIFB = 1 V VIFB = -1 V
-3.1 0.21 1.21 14 -
source current on pin GLHB sink resistance on pin GLHB source current on pin GHHB
-105 13.5 -105
-90 16 -90
-75 18.5 -75
mA mA
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UBA2016A/15/15A
600 V fluorescent lamp driver
Table 6. Characteristics ...continued Tamb = 25 C; settings according to default setting[1]; all voltages referenced to GND; current flow into the IC is positive; unless otherwise specified. Symbol Rsink(GHHB) tno VFd(bs) Dimming Ibias(DIM) Ri(DIM) HB protection Vth(sat)(SLHB) td(det)sat tleb(SLHB) Iadd(CF) Ibias(SLHB) Vth(ocd)(IFB) Vth(osp)(VFB) Vth(ov)(VFB) tdet(fault) saturation threshold voltage on pin SLHB saturation detection delay time leading edge blanking time on pin SLHB additional current on pin CF bias current on pin SLHB overcurrent detection threshold voltage on pin IFB open/short protection threshold voltage on pin VFB overvoltage threshold voltage on pin VFB fault detection time overvoltage extra or capacitive mode during burn state trel(fault) Vth(ovextra)(VFB) Ibias(VFB) Vth(low)EOL Vth(high)EOL Ibias(EOL) Vth(oveol)(VFB) fault release time overvoltage extra threshold voltage on pin VFB bias current on pin VFB low threshold voltage on pin EOL high threshold voltage on pin EOL bias current on pin EOL VFBPFC = 1.27 V VFBPFC = 1.27 V VEOL = 1.9 V VSLHB > Vth(sat)SLHB; VCF = 2 V VSLHB = 2.5 V Burn state 2.35 260 -107 -10 2.8 40 2.4 3.2 2.3 1.21 2.39 15.2 0.8 0.92 1.15 0.21 2.50 0.3 340 -96 -8.5 3.0 80 2.5 125 50 1 3.35 2.6 1.27 2.54 16.0 0.88 1.0 1.23 0.25 100 30 100 2.65 420 -85 -7 3.2 120 2.6 3.5 2.9 1.33 2.69 16.8 0.96 1.08 1.31 0.29 V s ns A A V mV V s s ms V A V V A V V V V V V V bias current on pin DIM input resistance on pin DIM VDIM = 1 V VDIM = 2.5 V -28 -26 30 -24 A k Parameter sink resistance on pin GHHB non-overlap time bootstrap diode forward voltage IFS = 5 mA Conditions VSHHB = 0 V; VGHHB = 2 V Min 13.5 1.25 1.0 Typ 16 1.50 1.5 Max 18.5 1.75 2.0 Unit s V
overvoltage end-of-life threshold voltage pin DIM open on pin VFB UBA2015A; UBA2016A VDIM = 1.0 V UBA2015A; UBA2016A VDIM = 0.5 V
Ven(oveol)(DIM) Vth(hswp)SHHB Vth(zvs)SHHB Vth(hswr)SHHB
overvoltage end-of-life enable voltage on pin DIM hard switching protection threshold voltage on pin SHHB zero voltage switching detection threshold voltage on pin SHHB hard switching regulation threshold voltage on pin SHHB
UBA2015A; UBA2016A fsw = 50 kHz fsw = 50 kHz fsw = 50 kHz
UBA2016A_15_15A
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UBA2016A/15/15A
600 V fluorescent lamp driver
Table 6. Characteristics ...continued Tamb = 25 C; settings according to default setting[1]; all voltages referenced to GND; current flow into the IC is positive; unless otherwise specified. Symbol Vth(cm)SHHB gm(hswr) Parameter capacitive mode detection threshold voltage on pin SHHB hard switching regulation transconductance Conditions tno(LH) UBA2016A; Ignition state hard switching step on pin SHHB above Vth(hswr)(SHHB) per extra volt step at fsw = 50 kHz 18 A/V Min Typ 30 Max Unit V/s
Vth(scp)(CPT) Rpar(ext)(CPT) Rs(ext)(CPT) tto(fault) tto(ph)/tto(fault)
short-circuit protection threshold voltage on pin CPT external parallel resistance on pin CPT external series resistance on pin CPT fault time-out time CCPT = 100 nF ratio between preheat time-out time and Rpar(ext) = 700 k; fault time-out time Rs(ext) not connected (short) Rpar(ext) not connected (open); Rs(ext) not connected (short) Rpar(ext) not connected (open); Rs(ext) = 40 k
80 700 0.16 3 4.7 9 12
[2]
120 0.19 3.4 5.2 11.5 17 30 18
160 40 0.22 3.8 5.7 14 22 50 22
mV k k s
Ibo(CF) V(Vreg-Vth(bo)) Idch(bo)CIFB Boost fsw(bst)(low) Nf(bst)low Vreg(bst)(IFB) NVreg(bst) Isat(BOOST) VBOOST
brownout current on pin CF
VCOMPPFC = Vhigh(COMPPFC); VFBPFC = 1.0 V; VCF = 1.5 V
A mV A
regulation voltage to brownout threshold VCOMPPFC = Vhigh(COMPPFC) voltage difference on pin FBPFC brownout discharge current on pin CIFB VCOMPPFC = Vhigh(COMPPFC); VFBPFC = 1.0 V; VCIFB = 2.0 V low boost switching frequency low boost frequency constant boost regulation voltage on pin IFB boost regulation voltage constant saturation current on pin BOOST voltage on pin BOOST IBOOST = 1 A IBOOST = 5 A IBOOST = 50 A IBOOST Isat(BOOST) IBOOST Isat(BOOST); Cext(CF) = 200 pF
10 14
21 0.14 1.75 2.3 120 65
24
27
kHz 1/A V V/A A V V V C C
0.165 0.19 1.84 2.7 1 1.4 140 80 1.93 0.24 3.1 2.2 160 95
0.180 0.21
Temperature protection Tth(act)otp Tth(rel)otp overtemperature protection activation threshold temperature overtemperature protection release threshold temperature
[1] [2]
Default setting; see Table 7. The threshold for the brownout protection is slightly below the normal regulation level on pin FBPFC. The design guarantees that it will always be below this level because the clamp current from the PFC OTA is used as a signal.
UBA2016A_15_15A
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600 V fluorescent lamp driver
Default settings for characteristics Pin 1 2 3 4 5 6 7 8 9 10 10 11 12 13 14 15 16 17 18 19 20 Application connected to ground connected to ground connected to a 2 V test supply connected to a 2 V test supply connected via a 33 k resistor to ground connected via a 100 nF capacitor to ground connected via a 200 pF C0G (NP0) capacitor to ground connected via a 100 nF capacitor to ground connected via a 100 pF capacitor to ground connected to ground; UBA2016A not connected; UBA2015 and UBA2015A connected to a 1.27 V test supply connected via a 100 nF capacitor to ground connected to ground not connected (open) connected to ground connected to a 13 V test supply not connected (open) connected to ground connected to a 13 V test supply not connected (open)
Table 7. Pin name SLHB IFB EOL VFB IREF CIFB CF CPT DIM BOOST PH/EN FBPFC COMPPFC AUXPFC GPFC GND VDD GLHB SHHB FSHB GHHB
UBA2016A_15_15A
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600 V fluorescent lamp driver
11. Application information
11.1 Connecting the IC in an application
A 33 k resistor must be connected between pin IREF and GND. The tolerance of this resistor adds to any current related tolerances of the IC, including fsw(low). No other components can be connected to pin IREF. Tolerance and temperature dependency of the capacitor connected between pin CF and GND will add to the tolerance on fsw(low). Small decoupling capacitors (about 100 pF) are recommended on pins FBPFC and IFB close to the IC. Normal sized decoupling capacitors (about 10 nF) are recommended on pins DIM and EOL. The capacitors at pins CF, COMPPFC, CPT, FSHB and VDD should also be placed close to the IC. A capacitor between pin CIFB and GND of at least 470 pF is needed for stability of the low switching frequency. A capacitor between pin VDD and GND of at least 10 nF is needed for stability of the internal VDD voltage clamp. However, for reliable operation of the IC a low ESR type of at least 470 nF is recommended. A capacitor between pin FSHB and SHHB is needed to supply the high-side driver. The recommended value for this capacitor is 15 of the value of the capacitor at VDD. A series resistor of at least 1 k is recommended on pins AUXPFC and SLHB.
UBA2016A_15_15A
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11.2 Without lamp current regulation or dimming
Objective data sheet Rev. 1 -- 20 May 2011 32 of 42
UBA2016A_15_15A
NXP Semiconductors
mains
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GPFC
FBPFC
VDD GHHB
AUXPFC
SHHB FSHB
UBA2016A
COMPPFC
GLHB SLHB
UBA2016A/15/15A
GND
IREF
CF
CPT
CIFB
DIM VFB
BOOST
IFB
EOL
600 V fluorescent lamp driver
001aam541
Fig 16. Typical schematic for minimal TL or CFL application with UBA2016A (mains filter not shown)
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Objective data sheet Rev. 1 -- 20 May 2011 33 of 42
UBA2016A_15_15A
NXP Semiconductors
mains
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GPFC
FBPFC
VDD GHHB
AUXPFC
SHHB FSHB
UBA2016A
COMPPFC
GLHB SLHB
UBA2016A/15/15A
GND
IREF CF
CPT
CIFB DIM
VFB
BOOST
IFB
EOL
600 V fluorescent lamp driver
001aan295
Fig 17. Typical schematic for basic TL or CFL application (better PFC performance than minimal application) (mains filter not shown)
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Objective data sheet Rev. 1 -- 20 May 2011 34 of 42
UBA2016A_15_15A
NXP Semiconductors
mains
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GPFC
FBPFC
VDD GHHB
AUXPFC
SHHB FSHB
UBA2016A
COMPPFC
GLHB SLHB
GND
IREF CF
CPT
CIFB DIM
VFB IFB BOOST EOL
UBA2016A/15/15A
600 V fluorescent lamp driver
001aam542
Fig 18. Typical schematic for basic TL or CFL application with UBA2016A with fixed time boost start (mains filter not shown)
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Objective data sheet Rev. 1 -- 20 May 2011 35 of 42
UBA2016A_15_15A
NXP Semiconductors
mains
NTC mounted close to lamp
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GPFC AUXPFC
FBPFC
VDD
VFB
BOOST GHHB SHHB FSHB
UBA2016A
COMPPFC
GLHB SLHB
GND
IREF
CF
CIFB
DIM
IFB
EOL
UBA2016A/15/15A
600 V fluorescent lamp driver
001aam543
Fig 19. Typical schematic for basic TL or CFL application with UBA2016A, with lamp temperature-dependent boost start (mains filter not shown)
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11.3 With lamp current regulation and dimming
Objective data sheet Rev. 1 -- 20 May 2011 36 of 42
UBA2016A_15_15A
NXP Semiconductors
mains
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GPFC
FBPFC
VDD GHHB
AUXPFC
SHHB FSHB
UBA2016A
COMPPFC
GLHB SLHB
GND
IREF
CF
CPT
CIFB
DIM
BOOST
VFB
IFB
EOL
UBA2016A/15/15A
600 V fluorescent lamp driver
001aam544
Fig 20. Typical schematic for dimmable TL application with UBA2016A (mains filter not shown)
NXP Semiconductors
UBA2016A/15/15A
600 V fluorescent lamp driver
12. Package outline
DIP20: plastic dual in-line package; 20 leads (300 mil) SOT146-1
D seating plane
ME
A2
A
L
A1
c Z e b1 b 20 11 MH wM (e 1)
pin 1 index E
1
10
0
5 scale
10 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 4.2 0.17 A1 min. 0.51 0.02 A2 max. 3.2 0.13 b 1.73 1.30 0.068 0.051 b1 0.53 0.38 0.021 0.015 c 0.36 0.23 0.014 0.009 D
(1)
E
(1)
e 2.54 0.1
e1 7.62 0.3
L 3.60 3.05 0.14 0.12
ME 8.25 7.80 0.32 0.31
MH 10.0 8.3 0.39 0.33
w 0.254 0.01
Z (1) max. 2 0.078
26.92 26.54 1.060 1.045
6.40 6.22 0.25 0.24
Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. OUTLINE VERSION SOT146-1 REFERENCES IEC JEDEC MS-001 JEITA SC-603 EUROPEAN PROJECTION
ISSUE DATE 99-12-27 03-02-13
Fig 21. Package outline SOT146-1 (DIP20)
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600 V fluorescent lamp driver
SO20: plastic small outline package; 20 leads; body width 7.5 mm
SOT163-1
D
E
A X
c y HE vMA
Z 20 11
Q A2 A1 pin 1 index Lp L 1 e bp 10 wM detail X (A 3) A
0
5 scale
10 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 2.65 0.1 A1 0.3 0.1 A2 2.45 2.25 A3 0.25 0.01 bp 0.49 0.36 c 0.32 0.23 D (1) 13.0 12.6 0.51 0.49 E (1) 7.6 7.4 0.30 0.29 e 1.27 0.05 HE 10.65 10.00 L 1.4 Lp 1.1 0.4 Q 1.1 1.0 0.043 0.039 v 0.25 0.01 w 0.25 0.01 y 0.1 Z
(1)
8o o 0
0.9 0.4
0.012 0.096 0.004 0.089
0.019 0.013 0.014 0.009
0.419 0.043 0.055 0.394 0.016
0.035 0.004 0.016
Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. OUTLINE VERSION SOT163-1 REFERENCES IEC 075E04 JEDEC MS-013 JEITA EUROPEAN PROJECTION
ISSUE DATE 99-12-27 03-02-19
Fig 22. Package outline SOT163-1 (SO20)
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600 V fluorescent lamp driver
13. Revision history
Table 8. Revision history Release date 20110520 Data sheet status Objective data sheet Change notice Supersedes Document ID UBA2016A_15_15A v.1
UBA2016A_15_15A
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600 V fluorescent lamp driver
14. Legal information
14.1 Data sheet status
Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet
[1] [2] [3]
Product status[3] Development Qualification Production
Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification.
Please consult the most recently issued document before initiating or completing a design. The term `short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.
14.2 Definitions
Draft -- The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet -- A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification -- The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet.
malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Applications -- Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer's sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer's applications and products planned, as well as for the planned application and use of customer's third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer's applications or products, or the application or use by customer's third party customer(s). Customer is responsible for doing all necessary testing for the customer's applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer's third party customer(s). NXP does not accept any liability in this respect. Limiting values -- Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale -- NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer's general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license -- Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control -- This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities.
(c) NXP B.V. 2011. All rights reserved.
14.3 Disclaimers
Limited warranty and liability -- Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors' aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes -- NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use -- NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or
UBA2016A_15_15A
All information provided in this document is subject to legal disclaimers.
Objective data sheet
Rev. 1 -- 20 May 2011
40 of 42
NXP Semiconductors
UBA2016A/15/15A
600 V fluorescent lamp driver
NXP Semiconductors' specifications such use shall be solely at customer's own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors' standard warranty and NXP Semiconductors' product specifications.
Non-automotive qualified products -- Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors' warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond
14.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners.
15. Contact information
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com
UBA2016A_15_15A
All information provided in this document is subject to legal disclaimers.
(c) NXP B.V. 2011. All rights reserved.
Objective data sheet
Rev. 1 -- 20 May 2011
41 of 42
NXP Semiconductors
UBA2016A/15/15A
600 V fluorescent lamp driver
16. Contents
1 2 3 4 5 6 6.1 6.2 7 7.1 7.2 7.2.1 7.2.2 7.3 7.3.1 7.3.2 7.3.3 7.4 7.4.1 7.4.2 7.4.3 7.4.4 7.4.5 7.4.6 7.4.7 7.4.7.1 7.4.7.2 7.4.7.3 7.4.8 7.5 7.6 7.6.1 7.6.2 7.6.3 7.6.4 7.6.5 7.6.6 7.6.7 7.6.8 7.6.9 7.6.10 7.6.11 7.6.12 8 9 10 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pinning information . . . . . . . . . . . . . . . . . . . . . . 5 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5 Functional description . . . . . . . . . . . . . . . . . . . 6 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Power Factor Correction (PFC) . . . . . . . . . . . . 6 Regulation loop. . . . . . . . . . . . . . . . . . . . . . . . . 7 Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Half-bridge driver . . . . . . . . . . . . . . . . . . . . . . . 8 VDD supply. . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Low- and high-side drivers . . . . . . . . . . . . . . . . 9 Non-overlap . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Fluorescent lamp control . . . . . . . . . . . . . . . . 10 Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Standby. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Oscillating states (Preheat, Ignition and Burn) 12 Preheat . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Ignition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Auto-restart . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Burn . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Lamp current control and dimming . . . . . . . . . 15 Operation without lamp current control. . . . . . 17 Boost . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Stop state . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Enable and Disable . . . . . . . . . . . . . . . . . . . . 18 Protection circuits . . . . . . . . . . . . . . . . . . . . . . 18 End-of-life rectifying lamp detection . . . . . . . . 18 End-of-life overvoltage detection . . . . . . . . . . 19 Capacitive mode detection . . . . . . . . . . . . . . . 19 Hard switching regulation (UBA2016A) . . . . . 20 Hard switching protection . . . . . . . . . . . . . . . . 20 Coil saturation protection . . . . . . . . . . . . . . . . 22 Lamp overcurrent protection. . . . . . . . . . . . . . 22 Lamp overvoltage protection . . . . . . . . . . . . . 22 Lamp removal detection . . . . . . . . . . . . . . . . . 22 Temperature protection. . . . . . . . . . . . . . . . . . 22 Fault timer. . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Brownout protection . . . . . . . . . . . . . . . . . . . . 23 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 24 Thermal characteristics . . . . . . . . . . . . . . . . . 25 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 25 11 11.1 11.2 11.3 12 13 14 14.1 14.2 14.3 14.4 15 16 Application information . . . . . . . . . . . . . . . . . Connecting the IC in an application . . . . . . . . Without lamp current regulation or dimming . With lamp current regulation and dimming . . Package outline. . . . . . . . . . . . . . . . . . . . . . . . Revision history . . . . . . . . . . . . . . . . . . . . . . . Legal information . . . . . . . . . . . . . . . . . . . . . . Data sheet status . . . . . . . . . . . . . . . . . . . . . . Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . Contact information . . . . . . . . . . . . . . . . . . . . Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 31 32 36 37 39 40 40 40 40 41 41 42
Please be aware that important notices concerning this document and the product(s) described herein, have been included in section `Legal information'.
(c) NXP B.V. 2011.
All rights reserved.
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 20 May 2011 Document identifier: UBA2016A_15_15A


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